Fable 5 designs a working PCB from a plain English prompt
The author had wanted to design a PCB for years but had never tried, and a first attempt to vibe-generate one with Claude Opus 4.8 came out terrible: it misjudged component orientation and could not route the board properly. Later he tried again with a different tool, Fable 5, and set himself two rules: no manual edits or verification of the board, and every problem before manufacturing had to be solved by Fable itself. He described the board he wanted in plain English, a development board built around the RP2350A microcontroller driving an E-ink display, and stayed out of the design phase entirely. After working autonomously for a couple of hours, Fable produced a 31.8 x 37.32 mm, four-layer board with a 1.54 inch, 200x200 E-ink display and 8 MB of QSPI flash, at an estimated 26 euros per board. The initial design had 65 DRC (Design Rule Checking) errors; following his own rule, the author reported them to Fable without diagnosing or fixing anything himself. Two component choices turned out wrong: the SPI flash chip, a W25Q128JVS, was specified with pads sized for the wrong package, and a transistor for the E-ink driver's boost converter was also given the wrong footprint. Both surfaced only once the author uploaded the files to JLCPCB. Fable initially insisted a compatible package existed for the flash chip, but the author could not find it in supplier LCSC's library, and they settled on a different chip, the P25Q64SH, instead. On routing, the design had 65 footprints, 54 nets and 118 unconnected lines. Fable used the open-source Freerouting tool, which ran for 2 minutes and, after seventeen passes, plateaued at 69 completed connections with 49 still disconnected; Claude hand-routed the rest. A colleague later pointed the author to a different open-source tool, KiCadRoutingTools, which routed every connection in 1.25 seconds. The author had never ordered from a PCB manufacturer before, and had Fable prepare the JLCPCB submission and tell him what to select in the ordering interface; a few components Fable had chosen were out of stock and had to be swapped in back and forth exchanges. He paid 130 euros for five fully assembled boards. When the boards arrived, he checked for a short between power and ground, found none, and the board was recognized by his laptop and worked immediately. He wrote proof-of-concept apps for it, including a stopwatch and a photo album that keeps displaying its image after the board is powered off, since E-ink retains its last image. He describes the outcome as "great and meh": he is glad he could get a working board from a plain-English description without any PCB design knowledge, but felt little sense of accomplishment compared to learning the process himself. At his day job he still reviews everything meticulously and cannot simply trust the output, but for hobby projects he intends to keep working this way. He hopes manufacturers like JLCPCB or PCBWay will eventually offer a direct chat interface that turns a description straight into a shipped board. His next project, already underway, is an NVIDIA Jetson Orin Nano based tablet, built under the same two rules using Fable 5.1 together with KiCad and KiCadRoutingTools.
Key facts
- An earlier attempt to design a PCB with Claude Opus 4.8 alone failed: it got component orientation wrong and could not route the board.
- Using a tool called Fable 5 under a self-imposed no-manual-edits rule, the author had it autonomously design a 4-layer, 31.8 x 37.32 mm RP2350A board with a 1.54" 200x200 E-ink display for about 26 euros per board.
- The initial design had 65 DRC errors and two wrong component packages (an SPI flash chip and a boost-converter transistor), both caught only after uploading to JLCPCB.
- Fable's chosen autorouter, Freerouting, left 49 of 118 connections unrouted after 2 minutes; Claude hand-routed the rest, while a separate tool, KiCadRoutingTools, later routed the same design fully in 1.25 seconds.
- Five assembled boards cost 130 euros from JLCPCB, arrived working on the first try, and the author is already building a follow-up NVIDIA Jetson Orin Nano tablet with Fable 5.1.
Why it matters
The story is a concrete, step-by-step account of an AI tool carrying a hardware design through its full pipeline, schematic, component selection, DRC, routing and manufacturing file preparation, with a user who deliberately withheld any PCB expertise or manual correction. It follows a failed attempt with Claude Opus 4.8 alone, so it also reads as a marker of how quickly agentic tools moved from unusable to functional on this kind of task within the same author's own experience.
Who it affects
Hobbyists and makers without electronics training who want to turn an idea into physical hardware are the direct audience; the account also matters to PCB manufacturers like JLCPCB and PCBWay, since the author explicitly wants them to build a direct chat-to-manufacturing pipeline. It says less about professional hardware engineering: the author notes that at his day job he still reviews everything meticulously rather than trusting the output outright.
How to use it
The workflow shown is: describe the desired board in plain English, let the tool design and select components without intervening, then relay any errors (such as DRC failures) back to it rather than fixing them by hand. Manufacturing went through JLCPCB, with the tool preparing the submission files and telling the author what to pick in the ordering interface; five fully assembled boards cost 130 euros. The author is repeating the same two-rule approach on a new project, an NVIDIA Jetson Orin Nano tablet, using a newer version, Fable 5.1, paired with KiCad and the KiCadRoutingTools autorouter.
How solid is it
This is a single first-person blog account, not an independent test or a benchmark, with a fairly simple board (65 footprints, 54 nets). Even so, it's detailed and falsifiable: exact dimensions, part counts, routing statistics and prices are all given, and the author documents the process's actual failures rather than only its success, including DRC error counts and the specific wrong-package parts.
Risks and caveats
The design was not clean: it shipped with 65 DRC errors and two components in physically wrong packages, an SPI flash chip and a transistor, that were only caught when the manufacturer's files were prepared, not by the design tool itself. Fable's own autorouter choice, Freerouting, could not finish the job, completing 69 of 118 connections before plateauing and requiring hand-routing, while a different open-source tool solved the same routing problem in 1.25 seconds, suggesting the tool's default choices were not optimal. The author also flags a non-technical cost: he felt little sense of accomplishment compared to learning PCB design himself, and treats this workflow as suited to low-stakes hobby projects rather than settings where mistakes are expensive.
“This meant I was going to trust Fable with my wallet.”
— the author